| Resent years, with the performance improvement of CPU and Memory, I/O is becoming the bottleneck that constraints the improvement of computer system. At the same time, the coming area of big data is requiring higher and higher I/O access time. To revise the I/O performance, traditional hard disk has done remarkable changes. However, limited by the fact that hard disk is based on the machine movement, the access delay cannot be improve fundamentally, and it is hard to break the I/O bottleneck using hard disk. Flash chip is the new generation of nonvolatile storage based on semiconductor technology. Benefiting from low latency, low power, and high resistance, its application is growing from embedded systems to persona! computers even in large scale data centers. However, some of its downing properties, such as asymmetry of read/write operation and out-of-place update, make it impossible to replace the hard disks directly by using flash. So, to use the flash just as hard disks without changing the computer system, flash translation layer (FTL) is proposed to govern the flash chips. Flash translation layer is in charge of the use of flash chips, it affects the performance of flash chip pretty much. Thus, how to design a high performance flash translation layer algorithm to improve the utilization of flash storage system and the I/O performance is of significant meaning.This paper focus on the design of flash translation layer which is used in real-time systems. Main functions of flash translation include address mapping, garbage collection and wear-leveling. Address mapping is in charge of changing logical address issued by the file system to physical address in flash chips. Garbage collection is consisted of the valid page copy operation and block erase operation. It is used to reclaim the blocks used to store invalid data. Wear-leveling is to use the blocks in a flash chip evenly and to prolong the life of the flash chip. Through analysis, this paper knows that by postpone the process of garbage collection, FTL can reduce the valid page copy operations in the storage system, shrink the cost of garbage collection and then improve the utilization of flash.This paper builds a module for flash storage system in real-time system, and proposes an adaptive partial garbage collection strategy. Based on this, two flash translation layer algorithms are proposed. The adaptive partial garbage collection strategy divides the garbage collection process into several steps. According to the status of blocks in the system, centralized partial garbage collection strategy and distributed partial garbage collection strategy are scheduled. Besides, in these two algorithms, an on-demand address mapping scheme was adopted. In which, logical blocks that are frequently visited are mapped with more physical blocks, and logical blocks that are seldom visited are mapped with few physical blocks. Besides, in DSFTL, a super block is formed by a set of logical blocks according to characters of the data to be written during actual operation process. By doing this, we can separate the hot data and cold date and then use the flash ship well.To verify the performance of the proposed FTL algorithms, a simulation platform was designed. By testing several benchmarks, we can evaluate the proposed FTL in terms of access time, the worst case of write access delay, the number of valid page copy operations and block erase operations. The experimental results show that our scheme reduces the valid page copy and erase operations significantly. Also, on the basis of providing a guaranteed worst case system response time, RAFTL and DSFTL can provide an average write request response time which is approximate to the time to write one page. |
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