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The Research And Design Of The Timing System Based On E1Interface

Posted on:2013-08-29Degree:MasterType:Thesis
Country:ChinaCandidate:H YanFull Text:PDF
GTID:2248330362972559Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
In this society, most application systems are composed of many components. Thecompleteness of the system’s work need that each component coincidently with others. Onceeach component do not keep coincident, the whole system would not complete its’ work, evencause disordered and lost. Timing System can ensure each component of the application systemwork coincidently with others, and avoid disorder. With the development of scientific technologyand society, the application of Timing System is extensive in more and more domain.According to the advantage of stability in transfer delay of E1, and high precision GPS time,this thesis introduce the design of Timing System based on E1interface, which use FieldProgrammable Gates Array(FPGA) to develop, and could trace the time to GPS time.Firstly, some theory is introduced, consist of the theory and application of E1interface, theknowledge of GPS and GPS Time System. Secondly, the design of the integrated Timing Systemis provided, the principle of the timing service of GPS is introduced. And the thesis provided thedesign of each component of Timing Equipment, discussed the problem of the transmission oftime message and sign in the E1line, and provided the method of solver, introduced the theoryof encoding and decoding of HDB3which is the code in E1, and the method of the measurementof line delay. Thirdly, the software design of the software module of system is introduced, thesimulation and procedure of software are provided, and make simple analysis and discussion.Finally, the design of the hardware of the integrated system is provided. The thesis is center onintroducing the circuit of E1interface, and supply the result discussion and of simulation.Through simulation and the proof of theory, the result proved the design is reasonable andpracticable, and the whole layout of hardware circuit is provided. The design use E1line totiming synchronous, Timing Equipment could inherit the advantage of the stable delay. Trace thetime to GPS time could ensure the precision of time. In addition, Timing Equipment could havethe advantage of simple circuit、low power、high stability and flexible design, for using theFPGA chip.
Keywords/Search Tags:Timing System, Timing Equipment, E1, FPGA, HDB3
PDF Full Text Request
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