Research And Design Of High Speed CMOS Optical Receiver For Optical Communication

OEIC is a good way to achieve high speed and large volumes in optical communications. Compared to the hybrid-integrated photo-receiver, the monolithic CMOS optoelectronic integrated receiver not only reduces the cost of receiver greatly, but also eliminates the parasitic elements caused by packaging and interlinkage between different modules, and electromagnetic interference and noise of extra environment effectively. This technology also has advantages of reducing chip area, achieving higher yield and higher reliability.Photodetectors and preamplifiers, and Front-end Circuit are the key components for optical receivers in optical communications. And in this paper the corresponding system structure, theory and design method of circuit and layout of commercial CMOS optical receiver are presented detailedly. A fingered P+/N-well/P-substrate photodiode with a 1GHz 3dB bandwidth was designed and implemented in Chartered 0.35μm EEPROM standard CMOS process. An active inductor compensated circuit and a high-pass filter superposition compensated circuit were designed and implemented. In addition, a differential common-source transimpedance amplifier (TIA) and a differential regulated cascode (RGC) TIA were researched and implemented.Based on Chartered 0.35μm EEPROM standard CMOS process, two types of optoelectronic integrated receivers were designed and implemented, including circuit design and simulation, layout drawing and tapeout. The experiment results show that a data rate of 1.5Gb/s is achieved by the optical receiver based on differential common source TIA, and a data rate of 1Gb/s is achieved by the optical receiver based on RGC TIA.The achievement of this paper provides some advices for the design of optical receiver, especially on the analysis and design of photodetectors and TIAs.