Research On Fully Differential Optoelectronic Integrated Receiver And Its Implementation In Standard CMOS Process

To promote the commercialization of FTTH (Fiber-to-the-home) for the pursuit of life comfort, monolithic, optoelectronic integrated receivers based on standard CMOS technologies have been researched much recently because they are not only low-cost, but also with better performance due to the elimination of disadvantages of the hybrid integration. However, none of monolithic, optoelectronic integrated receivers that are completely compatible with standard CMOS processes has been reported yet because of the limitations of silicon and standard CMOS technologies in optic detecting.In addition to the low responsivity of a standard CMOS, high-speed PD (photodetector), the structure of an optical receiver is another important factor that limits the performance of a high-speed, high-sensitivity standard CMOS optoelectronic integrated receiver. It is found that the non-fully-differential structure limits the sensitivity and the bandwidth of an optical receiver to a great extent through deep analyses of current optical receivers'structures. Hence, this thesis proposes a novel fully differential optical receiver with advantages of a doubled sensitivity and a much better bandwidth compared with a present differential optical receiver. To implement the monolithic integration of this fully differential optical receiver in a single standard CMOS chip, the following research and experiments are presented,1. A fully differential PD converting the incident light signal into a pair of fully differential electrical signals is proposed, and two types of device structure of this fully differential PD are also designed, that is, a p-n-junction-type and a schottky-type fully differential PD.2. Three p-n junction, fully differential PD completely compatible with standard CMOS processes and three corresponding, standard CMOS, fully differential optoelectronic integrated receivers were designed and implemented in a Chartered 0.35μm dual-gate process, a Chartered 0.35μm EEPROM process and a Chartered 0.18μm RFCMOS process, respectively. Experiment results indicate that the best one of these optical receivers achieves a 2.2 Gbit/s bitrate and a–12.2 dBm sensitivity for 850 nm wavelength and 231–1 PRBS (pseudorandom bit sequency) input signal.3. Two MSM (metal-semiconductor-metal) PDs completely compatible with standard CMOS processes for constituting the schottky-type fully differential PD and a standard CMOS, fully differential optoelectronic integrated receiver with integrated schottky-type, fully differential PD were designed and fabricated in a Chartered 0.35μm EEPROM process. Measurements at 850 nm wavelength demonstrate that the Metal1/NWELL MSM PD achieves a 919 MHz intrinsic bandwidth and a 0.21 A/W responsivity, and the optical receiver reaches a 1 GHz bandwidth.Moreover, a monolithic optical interconnect system completely compatible with standard CMOS processes was also designed and implemented in a Chartered 0.35μm EEPROM process based on the developed standard CMOS optoelectronic integrated receivers, and it has a measured speed of 100 KHz.Compared with recently reported, state-of-the-art, standard CMOS differential optoelectronic integrated receivers, the best one of standard CMOS fully differential optoelectronic integrated receivers presented in this thesis has an optical sensitivity higher than that of them by 4.2 dBm at bitrates above 1 Gbit/s for 850 nm wavelength. This work supplies a next step towards one-chip solution for low-cost optical receiver in short-distance optical communications, and optical interconnects.