Sopc Segmental Probability Model For Speech Recognition Algorithm Implemented

Conventional solution schemes for the embedded speech recognition are usually suggested by using single chip microcomputers or DSP. With the development of programmable logic technology, a new scheme which based on SOPC(Programmable System on Chip) is proposed:by which speech recognition based on FPGA units and soft-core CPU downloaded to FPGA has been successfully realized. It is simple, flexible, low-cost, programmable, and apt to upgrade system.This paper analyzes the Altera's SOPC integrated development environment and the DE2-70 Development Kit, studys on SOPC Builder, analysis of the speech recognition process. After the study of the NiosⅡsoft-core processor architecture, performance, Avalon Bus Specification, a microprocessor system which NiosⅡas the core is builded, and completed on the software programming and debugging. And implemented the speech recognition algorithm based on segmental probability model by C, including speech signal collection, voice activation detection, speech feature extraction, recognition algorithm implementation and recognition results treatment.This paper studies include the following:1. The use of DE2-70 SOPC hardware platforms and the QuartusⅡ;2. The overall design of the hardware and software base on SOPC and segmental probability model;3. The extraction of speech feature and its implementation;4. The segmental probability model and its implementation;5. Overall system test and evaluation.