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Research And Implementation Of Encoding And Decoding Algorithm Of LDPC

Posted on:2012-01-07Degree:MasterType:Thesis
Country:ChinaCandidate:G YangFull Text:PDF
GTID:2218330368988282Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
Low Density Parity Check(LDPC)codes provide performance that comes quite close to Shannon's limit, much attention is being given to LDPC codes due to their simplicity of iterative decoding and high lever of parallelism. They are widely used in satellite communication, mobile communication, wireless communication as well as memory system.Efficient encoding and decoding algorithms as well as their implementation are hot research field of LDPC codes. In this thesis, a low-complexity LDPC code encoder based on LU decomposition is studied, Normalized MS algorithm and decoder based on improve normalized min-sum algorithm with layered decoding architecture are studied.Firstly, the critical modules in implementation of encoder are studied across theory analysis combine with matlab simulation. According to a kind of LDPC codes, whose parity-check matrix do not show block-cirular patten, a low-complexity LDPC encoder is designd based on LU decomposition. This encoding method has the linear complexity, it is also suitable to long LDPC codes. Two LU decompositions were used to decompose 0.5 code rate LDPC code of CMMB. Encoder architechture is proposed. Implement of critical modules are introduced. The proposed encoder has a good practical value.Secondly, the BP, MS, Normalized MS, Offset MS decoding algorithm are simulated.An improved Normalized MS algorithm is proposed by adding one more normalization factor.Simulation result shows the BER reach 10-6 when SNR is 1.6dB. From simulation, the optimal correction factors are determined. A quantization scheme with expand scale factor is proposed, enhanced the information reliability. The proposed scheme obtain about 0.2dB compared to conventional one.Last, the improve normalized min-sum algorithm with layered decoding architechture is adopted. By use of determined parameters, a LDPC decoder architechture is proposed. Implementation of critical modules are introduced. The proposed decoder has simple network and shows a significant reduction of memory instances.
Keywords/Search Tags:LDPC, LU Decomposition, Encoder, Min-Sum Algorithm, Decoder
PDF Full Text Request
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