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Task Compiler Design And Implementation For REmusII Coarse Grain Reconfigurable Processor

Posted on:2012-01-08Degree:MasterType:Thesis
Country:ChinaCandidate:H WangFull Text:PDF
GTID:2218330362959824Subject:IC Engineering
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Coarse grain reconfigurable processor has both the flexibility of general purpose processor (GPP) and the efficiency of application specific integrated circuit (ASIC), which has been proved to be the best approach for the tough challenges in high density computation field. Coarse grain reconfigurable processor can speed up the processing of multi-media applications efficiently, so it has received frequent usage. The performance of a coarse grain reconfigurable processor depends not only on well hardware design, but also the corresponding task compiler design which can map the application to the reconfigurable array efficiently.This paper introduces the design and implementation of the automatic task compilation flow based on REmusII coarse grain reconfigurable processor. Firstly, the task compilation flow preprocesses the C program by reading the label information; the compiler front-end accesses the parallel instruction code autimatially and converts them to data flow graph (DFG); the compiler back-end divides the DFG into sub-graphs which can be mapped onto the reconfigurable array directly by using timing partition, the sub-graphs are mapped onto the reconfigurable hardware to generate configuration information. The main program and context are intergrated and compiled into the final object files for running on REmusII. In order to make full use of the RPUs and RCAs in REmusII, we design a marking and mapping program for multi-task parallel running. In order to transfer information between different compilation platforms, we use socket protocol to intergrate the environment of application development and task compilation.We use the C model of RPU and RTL code of REmusII to verify the task compilation flow. The suitability of the compiler for the target application domain is illustrated with code samples of H.264,AVS and MPEG-2 by an automatical verification flow. The results show that the task compilation flow can produce the correct configuration information of RPU and the correct object files of REmusII. The task compilation flow coordinates the main processor ARM and RPU, and the marking and mapping program achieve well performance on REmusII.
Keywords/Search Tags:coarse grain, reconfigurable, data flow graph, software-hardware partition, compiler
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