LDPC Decoder Design And Implementation Based On G.HN Standards

LDPC(Low-Density Parity-Check) code became the research hot topic and popular in modern communication system because of its excellence performance. LDPC code can approach the Shannon limit and be easily described with simple decoding architecture. The key problem is how to improve the performance and reduce the consumption of hardware resource.In this work, based on the newly introduced G.hn standards, we modeled the channel encoding system including LDPC encoder and decoder. Then we designed a high-throughput multi-rate LDPC decoder totally compliant to the standards and implemented it with RTL. In the design, a partially parallel architecture with maximum parallelism of 360 was introduced to greatly improve the throughput. We also used a newly simple but efficient early termination strategy to speed up decoding and save up energy. What's more, to improve the efficiency of the hardware, overlapped scheme is used and that can also save energy and improve throughput. In the end, the work compared the performance of the decoder to others and summarized the advantages and disadvantages, offering with a good reference for the implementation of the G.hn standards.