Design And Implementation Of Packet Buffer In IPQAM

With the development of current Internet technology, traditional broadcast TV business is challenged. The Internet media services with rich resources and friendly interactive show the obvious trend to replace the status of traditional TV business. The Integration of the traditional TV business and the Internet becomes a hot topic of TV business. IPTV technology, a practical and industrial solution for the integration, attracts a lot of attention. IPQAM, as the Internet and traditional broadcast television Network Bridge, plays a key role in IPTV technology. Packet buffer in IPQAM is an important module to determine the speed and performance, for the features of IPQAM that input data rate does not match output data rate temporarily and dropping packet never happen. The approach to design and implement a packet buffer removing the problem and smoothing video data streams is propoesd in the study.The industrial and social value of IPQAm is introdcutial in the chapters I and II. The input interface and output interface of IPQAM are analyzed following and the function of each module in IPQAM and their design requirements are also presented. Finally, the design requirements of the packet buffer in IPQAM are proposed in the chapters.In the third chapter, several approaches of general packet buffer are introduced as well as the diffcults of designing a packet buffer. The hierarchy of SRAM and DRAM archieture, an apporach to design packet buffer, is discuessed detailly, as well as the two common scheduling algorithms, MDQF (Most eficit Queue First) and ECQF (The Earliest Critical Queue First). The boundary size of SRAM in the two algorithms is also given in the paper.Morover; the boundary value of ECQF is amended according to the specific situation in IPQAM. Finally, the advantages and disadvantages of the two algorithms are compared, concerning the design requirements of the packet buffer in IPQAM.In the fourth chapter, a single level cache structure and mutil-level cache structure are compared fristly. Then, how to design a packet in IPQAM buffer is proposed, concerning the size of SRAM and the implementation compelxity. The desgin method of the packet buffer and almost every part in the packet buffer are presented with rich details. The used logic section number of the packet buffer could be viewed as refernce for readers.