| With the elevated levels of IC (integrated circuit) design and the development of microelectronics techniques, single-chip integrated circuits are getting more and more complexity, integrated circuit towords SoC (System-on-Chip) developing has become increasingly evident trend. System chip integration technology can effectively reduce power consumption, decrease chip size, increase system functionality, and improve the speed of chip design. Terefore, the SoC design method based on IP (Intellectual Property) core has become one of the main means in the modern IC design.Because of writing and reading further, higher transmission speed and stability of work, when UHF reader appears, it holds wireless filed especially the filed of handheld wireless. With the wide range using and innovation, a part of the reader especially digital basehand signal processing units are integrated into SoC system will be popular.Therefore, the selection of this topic possesses great practical significance.The thesis designs a single chip system with interrogator IP core and uses the IP cores which provided by OpenCores.These include OR1200, GPIO, UART 16550 and Wishbone Conmax Bus IP core and so on. In addition, our group provides the UHF RFID interrogator IP core, simultaneously, Altera supplys the chip RAM IP core and the PLL IP core. In order to keep compatibility with the IP cores which the OpenCores provides, all of them are designed with Conmax interface, and through the top-down hierarchical layout method to enable the IP cores forming a complete SoC system after completing each IP core design and simulation. Finally, I build hardware and software environment to finish the test of the interrogator SoC system.In this paper, I give the detail design including Hardware and Software verification platform, IP module function simulation,the whole SoC simulation and verification, and FPGA verification, at last, provid synthesis map and simulation waveform for the Interrogator SoC system. |
PDF Full Text Request