Font Size: a A A

Based On Fpga Video Image Processing

Posted on:2011-04-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y B LiFull Text:PDF
GTID:2208360308467225Subject:Mechanical Manufacturing and Automation
Abstract/Summary:PDF Full Text Request
In the past, in the processing system requiring high real-time attribution, DSP or specialized integrated circuit ASIC were usually used as the core processors. In dealing with the continuous improvement of frequency requirement, DSP also encountered a bottleneck. Long production cycles and costly development cost of ASIC have let people in the continuing search for new alternative devices. Recently, with the development of EDA technology, FPGA relies on the real hardware parallelism and great flexibility, and great advantage of quick occupying the market, have been widely used. In particular, the video image processing needs a large number of high-speed, parallel data in real-time video stream processing, FPGA can better play its unique advantage.This paper uses FPGA to implement a real-time image processing platform, including the selection of suitable fast algorithm, the whole system architecture design, Verilog HDL implementation and automated testing for each module. The paper analyzes the basic algorithm in the video image processing, based on the own features of FPGA, decomposes the algorithms into cross-cut parts for parallel hardware design. At the same time, in high-speed image processing platform, this paper through the FPGA achieves the I~2C controller module, asynchronous FIFO module, SAA7113 video signal acquisition module including decoding VPO bus ITU.BT656 format, YUV space to RGB color space conversion, flexible application the unreasonable resolution TFT-LCD, VGA controller indicates that the program, and Media filter and high-pass filter module comprising filter binary image module, as well as external processor interface module, while for SRAM memory operations to achieve a ping-pong operation, and the SDRAM controller module as PCB traces and process relationships can run the fastest 150MHz.The key of this system is to combine algorithms and hardware circuits, using parallel and pipelined structures to achieve, and totally different from the traditional use of PC software. In the software design reasonable data structure is the foundation stone to achieve a algorithm. The data structures in software are based on the order of execution. In the design of FPGA, these algorithms need to be broken down into the logic circuit structure which can be executed in parallel, and can apply to maximize the efficiency of the hardware structure.In the last of this article, this paper introduces the use of EDA tools for scripting to build automated test bench, and use test bench for the system to automate the test results comparing some of the basic steps, and finally, gives the debugging of each module and the experimental results.
Keywords/Search Tags:FPGA, real-time video image processing, image filter
PDF Full Text Request
Related items