| Today,FPGA companies have provided their customers with microprocessor soft cores, which can be downloaded into their FPGA products. This kind of FPGA has more flexibility and more powerful performance. OR1200 is an open source and totally free microprocessor soft core. Though designed for ASIC, it also can be used in FPGA. This paper intends to optimize OR1200 for achieving smaller area and faster frequency in FPGA implementation.We setup the software environment before optimizing OR1200. Then we take Altera Cyclone FPGA EP1C12Q240C8 as the experiment platform. We optimize OR1200 from 7 aspects, 3 aspects in datapath and 4 aspects in Mux logic.At the end of optimization, the LEs (logic elements) which OR1200 core consumes have been decreased by 1382. The LEs have been reduced by 36.4% than before. The maximum clock frequency has been increased 7.45MHz. It has been improved 16.1% than before.Through 7 aspects of the optimization, it can be seen that a reasonable application of FPGA hardware resources can greatly improve design efficiency, reduce the logic resource consumption, and increase clock frequency.To verify the optimized OR1200 core, we build a SoC system to achieve AC3 audio decoding and playing music files which are AC3 format. In this way the system level verification has been done. |