Wireless Communications Adc Reference Design

Wireless communication technology developed so fast that analog to digital converter need have higher accurate and faster sample speed. As the important module of analog to digital converter, the output characteristics of voltage reference can determine the overall performance of the ADC. Therefore, the current ADC for continuous improvement of the accuracy and speed, as well as the development needs of low-voltage low-power, high power supply rejection ratio, low voltage, low temperature coefficient voltage reference is a key research.According to requirements of the subject, the paper designed two different voltage reference. Which for the time interleaving structure 8bits 1.6Gsps high-speed ADCs, based on standard CMOS 0.35μm process 3.3V power supply voltage to design a high power supply rejection ratio precision band-gap voltage reference circuit. Pipeline structure for 14bits 100Msps high-speed high-precision ADC, based on standard CMOS 0.18μm process 1.8V power supply voltage to design a low temperature coefficient band-gap voltage reference circuit.Firstly, the reference of parameter, classification and working principle are introduced, and the traditional first-order compensated band-gap reference circuit operating principle and limitations of the analysis. Propose two high order Compensation BGR: high order terms elimination technology and curve compensation technology. Used high-order terms elimination technology, while added cascode circuit and power supply rejection ratio improved circuit, designed to fit the time interleaving structure of high-speed ADCs high power supply rejection ratio high precision band-gap reference circuit. Used curve compensation technology, while added low-voltage op-amp and shunt resistor circuit designed low power supply and low temperature coefficient band-gap voltage reference circuit for high-speed high-precision pipelined ADCs.Analysis and derived the voltage reference errors on the performance of ADC and the ADC output buffer requirements, And the establishment of a buffer load model, through MATLAB simulations got the specific requirements of the output buffer. Based on 0.35μm standard CMOS technology 3.3V power supply, power supply rejection ratio of high precision band-gap voltage reference circuit simulation results show that in -40°C~120°C, the temperature coefficient of 2.84ppm/°C, room temperature 25°C, power supply rejection ratio 97dB, power supply voltage range of 3.0~ 3.6V power supply voltage regulation rate of 0.35mV/V, set up time is 57ns, meet the requirements of the high-speed ADC 8bits 1.6Gsps. Based on 0.18μm standard CMOS technology 1.8V supply voltage, and low temperature coefficient band-gap voltage reference circuit simulation results show that in -40°C~120°C, the temperature coefficient of 1.91ppm/°C, 25°C, the power at room temperature suppression ratio of 65dB, power supply voltage range of 1.5~2.1V power supply voltage regulation rate of 0.75mV/V, set up time is 62ns, meet the requirements of 14bits 100Msps high-speed high-precision ADCs.