| In recent years, IC technology has quickly advanced. The semiconductor's feature size is shrinking. The integration and the speed of IC increasing rapidly. More and more difficult problems, in respect of area/size, timing sequence and power dissipation, will arise in the IC design. What we need to study and research is how to use the new technology to solve the problem in designing IC of 65nm and even below. Meanwhile,the technology progress also lead to the acceleration of the electronic products renewal,which confronts the IC design company with the pressure of cost and timely listed. Thus, how to implement the IC design in a quicker and better way is also what I need to master by exploring and accumulating experience in practice.This Paper studied IC backend design flow and customized method which is based on 65nm DDR PHY with the Synopsys EDA tools,IC compiler, Prime Time,Star-RCXT and so on. Using the Computer-aided Language, GNU MAKE and TCL, to improve the efficiency of backend design and shorten the development cycle, and its design scripts are reusable. Meanwhile, study and research of advanced technique and method shall be performed to resolve such problems as cell density, hierarchical design flow, leakage power, multi-corner multi-mode,crosstalk in the design craft of 65nm IC. |
