| With the rapid development of the information society, the proposition of the conception of Internet Plus and Industry 4.0 and the new generation of multimedia equipment, the new communication standards should be designed with faster speed of transmission and the ability of bus communication. MLVDS, also called Multi-LVDS which focus on the bus communication, is the extend version of LVDS which focus on the point to point communication. Its ability of low power consumption, high speed and excellent noise suppression make it widely used in modern society.In this paper, a brief history of MLVDS development and the present study status is reviewed. The main design problems need to be attention is proposed after a deep understanding of the TIA/EIA-899 standard. Based on solving these problems, a design blueprint which divided the MLVDS receiver circuit into three modules is proposed. The three modules are the voltage compress maintain circuit, the convert circuit and the compare circuit.The voltage compress maintain circuit is designed with the primary consideration of the wide input voltage range around -1.4V to 3.8V, by using the principle of resistance voltage dividing, which is so called voltage compression. Secondly, the compressed voltage is maintained near to a reference voltage. Finally, by using the current mirrors circuit, the output differential voltage is maintained the same with the input one, which is so called voltage maintain. The advantages of this circuit are that the circuit can simplify the design of convert circuit and make sure that the input of the compare circuit within its ICMR(Input Common Mode Range).In the design of convert circuit, the relationship of Type-1 and 2 is fully used to establish a voltage level shifting circuit. A model is proposed to illustrate the principles of the circuit and the error analysis is done by using the model.The compare circuit completes the function of Type-1 and 2 mode selection, amplification and the COMS voltage output.The function simulation is done after every instruction of the three modules. The layout of MLVDS is designed in SMIC 65nm COMS process after the analysis of the layout design strategy. Finally, the post-layout simulation is done after the extraction of the parasitic parameters.The simulation results show that our design of the MLVDS receiver achieves the acquired performance index. |
