The Design Of Digital Noise Reduction System Based On ADSP-BF561

Along with the development of modern industry, the dangers of noise pollution are increasingly serious, affecting people's normal study, work and rest. Thus it has drawn more and more attention how to suppress the hazards of noise on human activities. The analog noise reduction technology, which is the mainly noise reduction technology available both at home and abroad, can no longer satisfy the requirements of the treatment effect of noise, for it has some obvious shortcomings of poor reduction performance, stability and anti-interference ability. However, the digital noise reduction technology is better in all aspects such as noise reduction, stability and balance, and has strong anti-interference and self-recovery capabilities and so on. Therefore, the research of digital noise reduction technology has become a topic of interestFirstly this thesis introduce the principle and structure of the adaptive filters, the system structure, main characteristics, core structure, storage structure, peripheral interfaces, evaluation boards, and development environment of Blackfin ADSP-BF561. Then we have described the model and design of a digital noise reduction system proposal and have given the results of simulation also. By analyzing these results, we adjust the design parameters to achieve the better noise reduction performance for the update design on DSP.The focus of this design is in the digital noise reduction system software, hardware design and algorithm optimization. In order to solve the problem of the system overflow that appeared on DSP later, we analyzed the Least Mean Square algorithm traditionally used in audio processing, and presented an improved algorithm. Then the improved algorithm has been embed into the development environment Visual dsp++4.5 of ADSP-BF561 by configuring the audio hardware channel of the evaluation processor, and optimizing the algorithm using C language and assembly language. The system hardware circuits are mainly the audio peripherals circuit connected to DSP-BF561 chip and the input-output circuits of the evaluation processor connected to the AD1836.Based on the analysis and design abovementioned, we design a hardware circuit which can be used in digital noise reduction headphone and give the test results and analysis of the noise reduction performance analysis software in noise canceling headphones manufacturers. The digital noise reduction system has many improved performances in the low and medium frequency band, and the noise reduction can achieve more than 20 dB, which shows that the more balanced can be obtained in all audio bands.