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Dds Signal Source Fpga-based Design

Posted on:2010-12-29Degree:MasterType:Thesis
Country:ChinaCandidate:H SunFull Text:PDF
GTID:2208360275483915Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Students as an electronic experiment is to improve the students the impression that the knowledge and the discovery of problems and problem-solving skills, ability to increase the number of students have to link hands. The purpose of this desi gn is to develop a test to meet the needs of students signal source, based on the signal so urce for this purpose does not need to highlight the performance, but the economy requi res low-cost, easy to operate at the same time requirements that can output a variety of waveforms, and help students awareness on this platform source principle, at the same time facilitate the expansion of this development platform.The use of virtual instrument design technology as the instrument panel computer s creen, using EPP interface, developed at the same time in the FPGA control circuit, in o rder to follow the development of space left at the same time save costs. The design use d 16-bit address lines, 12-bit data bus of the static RAM as the source of the waveform me mory, the back-end using two types of filter needs to filter the signal filtering. Software needs to start when the first signal waveform data stored in memory to facilitate calls, th e final results meet the basic needs of the teaching experimentThis article introduces the structure of DDS chips direc tly the pros and cons of the production of signal source and the author of the original int ention of this design, and then describes the overall structure of the signal source, the ov erall module. The followi ng section introduces the internal FPGA design, including the majority of the overall structure and several modules, including: clock generation circuit, phase accumulator, data input control circuit, filter control circuit, control circuit start signal source.And then introduced the design of other modules, including storage options, the rate control circuit design and the design of filter circuits, the design of the range of control two-stage cascade DA, and pressure resistance of the back-end network approach to the design of regulation to improve the scope of the rate adjustment. For filter design, based on different signal frequencies, divided into four parts, for less than 500K is a signal use d by the active low-pass second order Butterworth filter,for more than 500K to 5M sign als used in the following filth-order RC low-pass filter.In software design, we divided into two parts, the underlying driver for me to use LabWindows/CVI as a platform for development, and implementation of the compiler to use its speed and connectivity and LabVIEW can be very good features. For the upp er control software ,I used to LabVIEW as a platform for development ,make full use of their plan design ,easy to extend.Finally, the paper summarizes the work and put forward the direction of further imp rovement.
Keywords/Search Tags:signal source, FPGA, EPP, LabVIEW and Labwindows/CVI
PDF Full Text Request
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