Fpga Clb Circuit Design Study

The paper is discussed about the CLB front-end designing and study of the FPGA. It aimed at developing series products of 1.8v FPGA, including CLB logic circuit and programmable circuit.A method of"front-end"design and on a design technology of custom layout was adopted in this paper. The idea of"top-down"was taken as guidance to design, the foreign advanced design experience was as well as used for reference and a FPGA offers up to 43,200 logic cells in devices up to 30% faster than the Virtex family was developed. First the CLB circuit was divided into several parts, and then the Verilog HDL was used to describe the circuits. After the program was verified, it has been put into actual circuits. At last the circuit was simulated to verify its signal and timing. After all of these have been done, the research has been completed and the layout job will be done by other people.New idea of my research subject was that a front-end CLB circuit was designed so that it can be easily used in the future FPGA designing as an IP core. The research is established in LUT, add carry and control logic, memory and other programmable circuit. After the circuit design of CLB was completed, the verification of logic circuit was also done. Then the CLB was fabricated in 0.18um CMOS process in TSMC.The simulation result indicates the performance of designed CLB reach the foreign similar products in the aspects of function and stability. The primary technology parameters of the CLB accomplish the foreign advanced level of kindred products. Advanced processing and 0.18μm design rules have resulted in smaller dice, faster speed, and lower power consumption. The results break through the adverse situation as all of the FPGA products and design technology were monopolized by several American companies, and satisfying urgent demands of national defending.