Digital Channel And Reconstruction, And Related Technology Research

Faced with the complex and ever-changing electronic warfare environment, the traditional receiver strong depends on the hardwares,which could not meet the new demands well. Without the constraint of hardware structure, the software radio is becoming the developing trend. It constructs a generic, normal and extended hardware platform, using software to re-configure and re-programmed in order to meet the different demands of the different situations, which has enormous commercial and military value.In this dissertation, a series studies are carried out according to specific projects. The main contents are as follows:1. The digital channelized and reconstruction system is researched in the dissertation. While retaining the advantages of dealing with a number of signals simultaneously, the channel reconstruction system could reduce the aliasing distortion effectively caused by the decimating and channels'overlapping when the signals'bandwidth is greater than the channels', which improve the feasibility of the digital channelized receiving technology. First of all, the basic theory of digital receivers, such as sampling theory, digital down conversion and multi-rate signal processing, is introduced. Derived on this basis, a digital channelized and reconstruction system's mathematical model is built up. Secondly, the system performance is analyzed and compared for the system characteristics,when the system is constructed by different digital filters. Some methods are discussed in detail to reduce the aliasing distortion and the signals'bits error rate. The method of generating the synthesizing filter banks by the analysis filter banks, which could reduce the aliasing distortion effectively, is testified through the simulation and analysis of the signals'reconstruction effects after the channelized receiving and the bits error rate after demodulation.The system software is implementated by C language based on the algorithm.2. The key performance of analogue to digital converter is introduced in this dissertation. The impact of sampling signal to noise ratio caused by the ADCs'aperture jitter, the IF frequency of signal is described in a mathematical method and illustrated by simulations, which could useful help to reduce the bad impact caused by the ADCs'aperture jitter.3. The imbalance of amplitudes and phases between the array signal channels would have a bad impact on the system performance, whose reason is researched. Several calibration methods are compared and analyzed. A correction program is applied based on the comparison method on time domain for the system's characteristics. The program is realized on the FPGA platform. The calibration accuracy is improved by extending the calculating bits and the pipeline processing is also applied to improve the efficience, which meets the demands of the design.