Digital Channelized Receiver System Design And Hardware Realization

In modern Electronic Warfare, the electromagnetic environment is increasingly complicated. It demands that the electronic reconnaissance equipment should be a digital, programmable, wide banded system which has entire probability interception capability. Digital channelized receiver is considered as a good model of electronic reconnaissance receiver. In this dissertation, a practical scheme is worked out to realize a digital channelized receiver. And a programmable hardware platform is also designed, on which the function of the receiver is realized by running the software. This project has real-time multi-signal processing ability and high probability interception capability. The advantage of this project is programmable, flexible and universal.This dissertation discusses technologies of digital channelized receiver, including the theories on ADC, DDC and polyphase filter. And the mathematic model of polyphase filter channelized receiver based on software difined radio is also analysed.According to the setting and requirements of the system, a specific scheme is put forward, including the algorithm, the data stream, and so on. In addition, the function of multi-mode dynamic configuration is realized, so that the number of polyphase filter taps and the subchannel bandwidth can be changed dynamically. Signals from three analog channels are processed on one PCB in order to save volume and cost. Every board communicates with others through the CPCI bus, which is based on an open specification named CPCI. The system PCB is designed and tested, on which AD6654, FPGA: EP1S30, DSP: TS201 are applied as main chips. The functions of AD6654 and FPGA are also realized and tested.It is proved in practice that the hardware platform can realize all functions of the system and fulfill requirments.