High-density Non-volatile Storage System Modeling And Design | Posted on:2009-02-21 | Degree:Master | Type:Thesis | Country:China | Candidate:Y Q Ding | Full Text:PDF | GTID:2208360272959464 | Subject:Microelectronics and Solid State Electronics | Abstract/Summary: | PDF Full Text Request | In this paper,we investigate into the design of PRAM(Phase Change Random Access Memory) and RRAM(Resistive Random Access Memory) in the quest for high density solutions of next generation nonvolatile memories.On evaluating the feasibility of multilevel storage,we propose and realize a multilevel HSPICE model based on physical mechanisms for the phase change memory cell.We propose innovative solutions of the Symmetric Bitline Compensation,the Stepping Wordline Voltage Compensation and the Wordline Voltage Compensation with Feedback aimed at addressing the voltage drop over parasitic bitline resistance.In order to validate the application of resistive material in a memory array and its peripherals,we implement an HSPICE model based on SCLC(Space Charge Limited Current) for the resistive memory cell.Furthermore,after the 3D storage concept,we propose the 1TxR resistive memory array architecture as well as the applicable environments. | Keywords/Search Tags: | Nonvolatile Memory, Phase Change Memory, PRAM, PCRAM, PCM, Resistive Random Access Memory, RRAM, High Density, Modelling, Multilevel Storage, 1TxR | PDF Full Text Request | Related items |
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