Based On The High-end Routing System Logic Control Asic Chip

This dissertation analysised the design development of high grade switching router and the primarily methods to achieve system function. The system design specification was constituted according to the whole system design requiments. The router schematics structure was confirmed based on the network processor(NP). The big capability Field Programmable Gate Array(FPGA) series of Spartan 3 was chosen to partition every logical function modules in system. The system logic design evaluation was done according to the ASIC design procession, the requirement analysis, the design logic code in detail, and synthesis of function logic with constraint conditions. All the logic modules were simulated the timing sequence, the logic fuctions, the static timing, and power. The placement and layout was optimized with the implement of system logic. Finally, all the logic function and timing validation were completed using the system board with boot code , FPGA code ,kernel and OS code. The testing results showed that the product achieved all the requirement of product spec.During the system logic design, this dissertation used the TOP-DOWN design strategy, and partitioned 15 logical modules according to the system functions. It sumed up every modules design block diagram. It showed the innovation and agility while the design for all the logic module, mainly showed in the control to the more devices in the system using the FPGA logic to extend CPU registers . Such as , the logic controled 5 FAN speed, which logic read and wrote the FAN speed register according to the FAN wavefirm pulse output, and system could control the FAN speed accurately through adjusting FAN voltage. The logic for temperature sensor used the FPGA register as CPU temperature status memory, when wrote or read the logic register like the FLASH , the system application software could use the detail temperature information to show the system internal temperature accurately, there were 4 classes temperature alarm range to set up but could different value according to the system safety requirements. The logic for DMP management accurately controlled the power modules on the system, which brought the detail power management idea in the high gate switch router system, through the FPGA logic accessing the DPM the system application software could show the system power module output detail voltage, current, temperature, voltage ripple, and configuration of the output voltage and current range to prvide the limitation for system alarm and protection. The logic of the system redundancy power supply unit also provied some new control and management methods to make system power steady and reduced the loss and risk caused by the power issue , because the system could supply the power with the two redundancy power supply units and also power on individually.This dissertation adopted the FPGA design roles roundly, respectively the area and speed role, hardware role, system role, synchronization role,also the IP core , which offen used in the large scale integrate circuit. In this dissertation the DMP, SFP, XFP logic modules used the IIC logic IP core. All of these roles used in design saved the whole system design and validation schedule, and reduced the code for testing and validation.This dissertation made the constrains for system performance in timing, placement, blocking,layout, synthesize,and configuration phases. This dissertation adopted the function and timing simulation , also used static timing validation to check the system logic accuracy. Furthermore it ran the diagnostic software to check whole system functions with FPGA logic, confirmed the system logic design all right.