Array Fiber-optic Probe System Measuring The Shock Wave Arrival Time

The optical fiber probe system, designed for measuring the shock wave parameter, has already been used widely. It has a lot of advantages, such as being able to suffer high temperature,high pressure and high impact, interference immunity, wide band and small size. With the development of electronic technology, decreasing the cost and miniaturizing the system are required urgently in the optical fiber probe system.With researching the theory and realization of the traditional optical fiber probe thoroughly, a feasible scheme of a new-type optical fiber probe is proposed based on FPGA. A modulated laser signal, which could enhance the reliability, is used in this system as the carrier wave of the shock-wave front information. These methods being used in the optical fiber probe system have never been reported before. A fiber array is used to improve the spatial resolution of the system; Xilinx Virtex IV FPGA is in charged to control the data stream, which would simplify the logic control circuit, avoid the requirement of many digital oscilloscopes, decrease the cost, and make the system miniaturization be possible; the system is connected to personal computer through Serial Interface, which is simple, low-cost and reliable.In this dissertation, the implementation process of the hardware system and the programming of the software system are presented. In aspect of hardware circuit, the components have been selected, such as the FPGA, the oscillator, the power supply, the configurable PROM, SFP and NTRAM, etc. The schematic diagrams of the circuit have been completed using the Cadence high-speed circuit software. The theory of transmission line has been introduced, and the signal integrity problem encountered in the high speed circuit design has been analyzed theoretically, including signal reflection, crosstalk, and ground bounce. Eight-layers PCB board has been designed considering the theories mentioned above. In aspect of software designing, Xilinx ISE developing environment has been used, and Verilog HDL has been chosen as the RTL synthesizable HDL description language. The FPGA chip has been designed as the dataflow controller, including the digital clock manager (DCM), the realization of the SFP controlled by MGT, the controller of the SRAM memory, and the communication controller between PC and FPGA. As DCM and MGT are too complex to design, Intellectual Property (IP) cores supplied by Xilinx Corporation have been used here to make the system more reliable. The simulation and verification environment has been built by testbench in ModelSim.The new implementation proposed in this dissertation would improve the spatial resolution, cut the cost, and reduce the volume of the system. This dissertation is an innovative study for miniaturizing the optical fiber probe system, which is valuable for the completion of the project.