Fpga Design And Implementation Of Digital Tv System-level Multiplexer

Digital TV has been one of the most popular research fields in the information industry, and more and more people join this field to research the correlation technology and the product of digital TV. The FPGA and EDA technology bring huge change in electronics system design. This thesis applies the FPGA technology in digital TV system, and makes research on digital TV front-end system key equipment——MPEG-2 transport stream multiplexer, and FPGA modeling and implement.The design principle of multiplexer—MPEG-2 and the data of multiplexer are investigated deeply in this paper. According to that, we design a resolution of multiplexer with FPGA. In this thesis, we analyze how to design a multiplexer according to MPEG-2 protocol. And we elaborate the design of most important technology of designing multiplexer: how to complete the design of reconfiguration of PSI and the modification of PCR.The thesis completes the design of multiplexer using by the frame of FPGA and MCU. We complete the main function of multiplexer with four EP1C6, one EP1C12 and one IP2022. After designing the multiplexer, we use the Transport Stream analyzer of MPEG-2 to examinate the multiplexer and the multiplexer works normally. The multiplexer based on the resolution in this thesis has been examinated by Metrology and Test Center of Radio and Television State Administration of Radio, Film and Television. And we get the certificate awarded by the Metrology and Test Center.