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Design And Implementation Of Fec Technology, Wireless Digital Audio Transmission Platform

Posted on:2008-07-30Degree:MasterType:Thesis
Country:ChinaCandidate:F SunFull Text:PDF
GTID:2208360212999999Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Along with the development of electronic technology, there is a growing concern about wireless digital data transmission.The focus in this area is how to reduce the EBR(Error Bit Ratio) efficiently to keep the received data in high quality.The main content of this thesis is the realization of a digital audio wireless transmission platform, which is based on FEC (Forward Error Correction) algorithm and FPGA (Field Programmable Gate Array) technology. The perpose of this design is to reduce the receiving end EBR to 1×10-7, when the channel EBR is 3×10-3. This platform can be used in the design of wireless earphone, which can highly reduce EBR and recover music with high quality in the receiving part.The system of this platform is first built in Matlab, and then programmed in VerilogHDL. The IP core's synthesis, route-place and assembling are done in QuartusII5.0, and its timing simulation is done in Modelsim. Then, the programs are downloaded in chips of Cyclone series of Altera and verified.The most important part of the design is the chosen of error correction code in FEC. After careful analyze, we chose twice RS(Reed-Solomon) encoding and an interleaver as the basic elements of error correction algorithm. This algorithem is introduced in detail and tested in this thesis, and the result of testing showed it fulfilled our EBR index.In order to implement wireless transmission, we chose 2.4G RF transceiver A7121 of AMIC and controlled it in FPGA.In practical application, the EBR can be decreased more by increasing iterative degrees, so that this platform can be used in place that requires better audio quality.
Keywords/Search Tags:FEC, FPGA, Error Correction Encoding, Interleave, Wireless Transceiver
PDF Full Text Request
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