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Wireless Sensor Networks, Microprocessor Design And Realization

Posted on:2008-11-06Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y LiuFull Text:PDF
GTID:2208360212499859Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of Wireless Sensor Network (WSN), the controller of wireless sensor network must satisfy the requests of low-cost and low-power dissipation. General microprocessor and microcontroller cannot meet the requests. To master the core technology of wireless sensor network and construct WSN developing platform with self-owned intellectual property, designing an application specific microprocessor for WSN becomes urgent and it also improve the technology of WSN in China.This paper firstly makes a thorough research on the architecture of embedded microprocessor. Then 8bits data bus application specific microprocessor for WSN based on Reduced Instruction Set Computing (RISC) of EM78815 is designed. The microprocessor is called WMCUOl. Advanced pipeline technology, separated readbus and writebus of Harvard structure, advance control and interrupt are realized in this design. The function of WMCUOl has been verified on the FPGA platform. Finally, the chip is fabricated with SMIC cmos-180 nanometer process.This paper focus on the realization of low-cost and low-power dissipation on WMCUOl.The design adopts top-down methodology.Verilog HDL is used for coding and designing testbench. It is convenient for synthesis, simulation and test. The design emphasizes the goals of low power dissipation and production cost from system level to circuit level.Experiments indicate that the system has achieved the performance of WSN nodes. The data-gathering and data-accessing algorithms of the node are realized on the WSN platform successfully. Finally, a non-center, multi-hop, self-organization and dynamic topological WSN is constructed.
Keywords/Search Tags:MCU, RISC, WSN, Havardbus, Pipeline
PDF Full Text Request
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