Image Interframe Prediction Based On Low Bit Rate Of The Fpga Design

With the development of mobile communication and IP internet, multimedia communication had become the prevalent operation. So it was urgent to make better video coding standard to fit all kinds of applications, such as video phone, meeting TV, image and video multimedia. Recent years, H.264, the latest video compression standard had led the research in related fields.This thesis presented an invariable low-bit rate project about video transmission. It was focused on H.264 and its realization based on FPGA. The paper emphasizes two key techniques in H.264 encoder: Motion Estimation and Bit Rate Control.Motion estimation was the most important part in H.264 encoder. An efficient VLSI architecture was designed according to the fast searching algorithm after evaluating speed and resource. It was a parallel-pipelining processing architecture with 36 PEs. The present project was improved by avoiding some complex calculation based on classic rate control algorithm and requirement of low bit rate conditions.Real time video coding system which was implemented based on FPGA occupied less resource and could make invariable low bit rate video transmission with CIF (25 frames per second). Now, the system architecture and part of components have been accomplished, and there w(?) still much work need to be complete.