Font Size: a A A

Analysis Based On Adventure, Low-power Design And Test-based Design Verification

Posted on:2003-02-26Degree:MasterType:Thesis
Country:ChinaCandidate:G H LiuFull Text:PDF
GTID:2208360185995493Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
Low power design is important to today'S digital circuits.Hazards increase the power dissipation in CMOS circuits and may cause malfunction of sequential circuits.Manymethods have been brought out to detect and eliminate hazards in digital circuits.But theaDplication of these methods is usually very time consuming or may lead to large hardware overheads.This paper investigates the hazards resulted from the Single Input ChangefSIC.hazard)and Multiple Input Change(MIC—hazard)and proposes a method to detect andeliminate them respectively.An SIC.hazard may occHr on a gate if the gate is an joint point oftwo paths of different delay, and the number of inverter,NAND gate and NOR gate on thetwO paths are odd and even respectively.An MIC-hazard may occur on a gate if there are two paths of different delay converging on it.Based on the above observation,an efficient method is proposed to detect hazards in digital circuits.By distinguishing the hazards caused by single input change and multiple input changes,hazards may be estimated with higher reliabilitV.Also,in this paper a hazard elimination method is proposed.After a hazard is detected,we try to eliminate it by modifying the delay of some paths.The technique of hazard detection and elimination proposed in this paper is of...
Keywords/Search Tags:low power, delay, hazard, verification, test generation
PDF Full Text Request
Related items