Design And Implementation Of A Multi-standard Video Format Conversion Interface Circuit

Many TV manufacturers are actively exploiting overseas markets of televisions today. There are so many specifications of standard analogue TV broadcasting for many historical reasons that modern televisions have to be capacity of being input several types of video from different interfaces. With the high development of the Internet technology, high quality video are transmitted through the interconnect net. Up to now, the transformation from analogous TV period to digital TV period is determined by government, and according to the estimation this transformation would last for 5 to 10 years. During this interval, both analogous and digital TV broadcasting will have to be transmitted. Modern TV should be prepared for this situation and can receive both analog and digit videos. It's obviously that the format conversion is required for the TV. In this paper we propose a new interface circuit to perform this task.First, videos with standard analogous format, high digital TV signals and videos from the computers are addressed. Many parameters of these formats, such as horizontal parameters, vertical parameters and scanning methods are given. Both I2C-bus protocol and DVI1.0 protocol are detailed, too.Secondly, the interface circuits which can perform the video format conversion is depicted. The circuits use the MA156 chip to decoder three types of standard analog format video, such as PAL, NTSC and SECAM, and digitalize them and encode the digital signals into the CCIR 656 standard format data. The signals of CCIR 656 are converted into the signals with the format that is suitable to the display devices. The analog-to-digital conversion is completed by AD9883A chip for the signals of HDTV from Y/Pr/Pb interface and analog RGB component signals from VGA interface. These digital signals from the AD988A also are converted into the desired format signals. The circuit for the format conversion of T.M.D.S. signals also is described.At last, the adjustment and testifying of the interface circuit is completed.