The Design And Implement Of Format Conversion Module Integrated In Video Signal Processing Chip

Video Signal Processing Chip is one of digital TV core chips. This chip's main function is to converse the source digital signal of TV to the format of the target display. In addition, It has some assistance function such as image boost up, OSD and so on. As the development of digital TV, This chip, which is the research hotspot of communication domain, has huge market foreground.The format conversion part of video signal processing has been monopolized by occident companies for its heavy calculate, complex algorithm and different hardware implement especially for its configurable and expansibility.This paper summarizes and studies the present technique, then bring forward a algorithm and method of hardware implement, which adapt to the video signal processing chip. Finally, it present the result of test and FPGA validate. This paper is summarizes as follows:Firstly, on the video time domain interpolation, to deal with the shortage of search technique in the same type chip, which cause too much wrong move vector , the author brings forward a frame rate up-conversion algorithm based on full-search block matching, self-adaptive interpolation and adopts the hardware implement architecture based on time-sharing pipelining to reduce the hardware resource.Secondly, on the scaling, the author compares two present algorithms: the filter and polynomial approach, and find the bi-cubic is better through the contrast of implement result.Thirdly, on the architecture of system, the author uses the cycle arbiter to mobilize data, take into account the configurable and expansibility, and achieve conversion among several formats.Finally, this module has achieved the system integrated, simulation and FPGA verified, In addition, the author gives the simulation result and implement picture.