| With the development of IC manufacture process and the enhancement of its design complexity, the verification requirement to IC is much higher. Especially since 1990s, verification of IC has become more complicated for the development of SoC technology, which makes more chips be integrated in one chip.How to improve the verification efficiency and decrease the workload of designers'has become an emergent problem to the designers. In order to solve this problem, each IC design groups has spent much time, and some of them even developed new methods or languages.In order to occupy a position in this field, our design group enters into it, and our aim is to reach to the front border. In order to do so, we have independently developed a SoC Hardware Software Co-verification System.In this background, the Transaction-based Hardware Software Co-verification method is further studied in this thesis after analysis of the materials abroad. This method combines the virtues of both Transaction-based verification and Hardware Software Co-verification. It supplies transaction processing capability on the basis of Hardware Software Co-verification. Systems are verified in a transaction level not an event-based level which the existing verification methods are based on. This method has been successfully implemented through the SoC HardwareSoftware Co-verification System which is developed by me and other partners in our group. In the particular implement process, the whole system is divided into two parts. SystemC is used to implement the software part. The package making, data transmitting and receiving are all implemented in this part. The hardware part is implemented through HDL. And the communication between these two parts is implemented through SCE-MI.In the end, this method has been successfully verified through our own platform. The result shows that the verification speed is 200 KHz. The verification speed is 2 times faster than that of the other two verification mode for the same DUT. The... |
