Analysis And Design Of Molecular Circuits For Smart Power Ics Central

SPIC (Smart Power Integrated Circuit) based on new power MOS device develop rapidly along with the advancement of Micro-electronics technology. A sort of SPIC—PFC (Power Factor Corrector) circuit also gradually become a major concern for research along with the concern of power harmonics pollution. Furthermore, many international standards (such as IEC, VDE, CENELEC, IEEE) strictly limit harmonic content that are produced by electrical appliances or nonlinear loads. The power factor correction technology can be divided into two parts: one is passive PFC , the other is active PFC. Usually the former can improve power factor up to 95%, the latter can improve power factor approximately unity. Many international companies have put their PFC chips on the markets, such as MC33262, MC34262, L6561, L6562, ML4812 etc.In this paper, we studied on critical current mode active Power Factor Correction technology, and did a detailed analysis and design on voltage reference circuit and analog multiplier circuit. The basic principles of several voltage references were analyzed and the reference which is suitable for the practical application was selected. Further, the methods of improving power supply rejection and high-order temperature coefficient compensation was studied and the voltage reference after tape out was tested, the test results were analyzed too. For analog multiplier, the basic principles were analyzed and input, output circuits were designed. Finally, the layout was designed and several circuits'layout was given.