The Study Of A Power Factor Correction Chip Without Multiplier

Adding power factor correction(PFC) function can reduce current harmonicpollution and increase power efficiency when electricity equipments connecting to ACpower supply through bridge rectifier.The PFC technology for large power applicationhas been developed,but the research of PFC technology for small power applicationdidn't get attention until recent years.So this paper emphasizes the design of low costPFC chip to fit the growing of small power equipments.There are several topology structures for PFC applications, and the boost type iswidely used,because it is easy to control ,and it has a more simple inner structure,morehigher efficiency, furthermore,the boost type can gain an commercial advantage overother types when working under the critical Conduction mode in small powerapplication.By introducing the control strategy of boost topology PFC system,andanalysising the CRM theory, this paper designed one none multipler PFC chip namedAET3846,which integrating a multi-vector error amplifier that can provide a fasttransient response in a low-bandwidth voltage loop,and a THD optimization circuit thatcan reduce input current Crossover distortion.The designing process and theoptimization of the function block circuits of the chip are introduced in the paper.Further more, they are simulated by Hspice/Cadence with CMOS model. Thesimulation results indicate that the circuit has a perfect PF and lowe input current THD.