Gpon Chip, The Logic Of The Aes Algorithm To Achieve Gpon Chip Verification

With the development of IP-based networks, the network traffic gets larger and larger, access network becomes the bottle-neck of Internet. The coming age of multimedia requires more bandwidth of access network, questionlessly GPON network meet this request. The recent research of GPON has come to the design of chip since the GPON standard brought out at 2004.The paper focus on the following two parts: Logically implementing the AES algorithm of GPON and relative research on the GPON chip verification. Because of the complexity of AES algorithm and the logical dimension is huge, it is important to develop a good way to control the logical dimension. This paper proposed a new method that can control the logical dimension well, and at the same time it meets the requirement of the SOC design concept. And the research on the chip verification is the key of IC design. What is more, the character of the system makes the GPON chip verification more complex. The paper combines the pioneer verification skills and the character of the system, proposes the testbench structure that suit the GPON chip verification and also part of the implement methods.