Gpon System Shared Cache Module Design

In the recent year, with growth of requirements from both voice and data networks, the access network presents an even greater challenge when high bandwidth requirements are combined with high price sensitivity; legacy solutions based on either SONET/SDH or Ethernet are neither cost-effective nor scalable as an alternative for an optical access solution. This is where Passive Optical Networks (PON) in general--and the emerging GPON technology specifically--come into play by offering a cost-effective, flexible, scalable means. The download rate of GPON is 2.4Gbps and upload rate is 1.25Gbps, which can meet the requirement of multi-service access network. The issue of ITU G.984 protocols has brought the recent research of GPON to the stage of chip designing.Share-memory is a mature, common structure of packet switch, which can supply perfect throughput and delay performance. According to the requirement of GPON data rate, share-memory could be a simple and easily- designing structure.This paper proposed a share-memory switch structure which is adopted into GPON system, and a memory management method based on packet descriptor. This method with"zero-copy"technology can avoid the copy operation for several times between the packet queues, make use of data switch and storage of common memory pool.The novel access network technology usually has used hiberarchy scheduling mode to distribute the limited bandwidth. In this mode, the packet descriptor queue occupied few chip resource, and made the hiberarchy scheduling module with thousands of queues possible.In chapter 1 and chapter 2, we introduced the performance of GPON and GPON protocol stack. In chapter 3, we proposed a structure in OLT and ONU based on share-memory, and analyzed the function of each sub-modules. In chapter 4, we described simulation design of the share-memory module in the SystemC platform, and analyzed the result of simulation.