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Signal Integrity Simulation, And The Underlying Drivers Of High-speed Digital Test Module Design

Posted on:2007-09-02Degree:MasterType:Thesis
Country:ChinaCandidate:Z H GuFull Text:PDF
GTID:2208360185456663Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
With the development of science and technology, the demand on electronic measuring and instruments has become higher. In data testing, simulation is supplied by digital signal generator and the data is sampled by logic analysis instrument, which is the traditional testing method. However, the logic analysis instrument captures data rapidly and replays slowly and this mode goes against real-time processing, not to mention the real-time cooperation between digital signal generator and logic analysis instrument. Thus more powerful high-speed digital testing instruments are needed. This high speed digital test module is based on the VXI bus structure and specified on multi-channel and high speed aspects; It is also capable of generating the stimulant signal and collecting the responded data; Meanwhile because the relationship between stimulation and response can be programmable, the module is highly intellective and it helps the testing system work more automatically; What's more, with the good functions like real-time comparison, branch, single step, pause, trigger , it makes the testing more efficient as well.This dissertation is written on two aspects according to the author's work in this project:1. Signal integrality preservation.This module is dramatically improved on data speed between chips and boards compared with normal digital test devices. Because of the improvement on data speed, signals can be distorted easily during transmission, such as glitch, distortion. Therefore a most important task is how to solve the problem of waveform distortion named signal integrality preservation in order to confirm the high speed in this test module. This paper concludes ways to deal with reflection, cross-talk and SSN; and also discusses the signal integrality under high-speed digital circuit design.2. The design of low-level driver of PowerPC 405.After thoroughly collecting and consulting the latest information in the field of SOPC, in this thesis we choose FPGA embedded PowerPC405 processor hardcore to construct the demanded SOPC system, which manages to meet the application demand between...
Keywords/Search Tags:high-speed circuit, simulation anlaysis, PowerPC, IP core, low-level driver
PDF Full Text Request
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