.1.5 V, 98db Dynamic Range Sigma-delta Modulator Research And Design

In recent years, oversampling techniques based on sigma-delta modulation are widely used to implement the interfaces between analog and digital signals in VLSI systems. This kind of technique can offer numerous advantages for the realization of high-resolution analog-to-digital converters (ADCs), and be insensitive to process variations. In other ways, the architecture is power-efficient means of implementing ADCs. Adopting suitable low-voltage techniques can make circuits work well.In this thesis, the theory and parameters of ADC, the theory of first-order and high-order sigma-delta modulators have been introduced. Unfortunately, the modulators of higher order are inherently unstable, so using cascaded sigma-delta modulators is suitable. Especially, the mismatch of the cascaded modulator and non-ideal characters of switched-capacitor integrator have been discussed. The three-order modulator has a 2-1 cascaded structure and 1-bit quantizer at the end of each stage, the modulator is implemented with fully differential switched-capacitor circuits. And then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i.e., OTA, switched-capacitor integrator, quantizer, two-phase non-overlapping clock signal, etc., at the same time, these circuits will be simulated in Spectre and Hspice. At last, the whole cascaded modulator will do behavioral level simulation by MATLAB soft and SIMULINK Toolbox.The proposed modulator uses 0.35um standard CMOS process, the NMOS and PMOS threshold voltage is 0.54 volt and -0.48 volt, respectively, and the power supply is 1.5 volt. The Nyquist converter rate is 50 kHz, oversampling ratio is 80. The proposed modulator can obtain 98dB dynamic range, 16 bits converter resolution, and fits for high-fidelity, digital-audio application.