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Multi-machine Environment, The Bus Interface Unit Design And Research

Posted on:2007-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:Z G ChiFull Text:PDF
GTID:2208360182978623Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
The author has taken part in the design of 32 bit embedded RISC microprocessor "Longtium" R2 which is based on the National Defense Preliminary Research Project: the research of the design of the 32 bit microprocessor used in the new generation of battleplane(project number is 41308010108)."Longtium" R2 is compatible with PowerPC 750 Instruction Set Architecture (ISA) and the PowerPC 60X bus protocol. The authour designed the bus interface unit (BIU), which can be used in the SMP(Symmetric Multiple Processor) environment.The research work of this dissertation mainly includes:1. Based on the deep research of the PowerPC750 architecture and PowerPC 60X bus protocol, the dissertation presents the design of bus interface unit of the microprocessor. The result of post-layout simulation in hard environment shows that the critical path of the processor is 4.07ns, which meets the demand of the clock frequency of 233MHz.2. After finishing the design of "Longtium" R2, the author has discussed several technique which can be applied to the bus interface unit to impove the microporcessor's performance when working in the multiprocessing environment, which includes victim buffer, merging write buffer, optimization of address bus tenure, out-of-order bus operation and data intervention. Simulation results show that adding victim buffer and mergeing write buffer can both reduce the memory access.3. Based on the thorough studies of current verification strategies, the dissertation introduces a set of verification methods for Longtium R2. The author finished the module level verification of bus interface unit and took part in the system level verification of Longtium R2.4.The test based on FPGA shows that "Longtium" R2 can run successfully small monitor program, big monitor program, and VxWorks operating system.The back-end design of Longtium R2 has been finished by Cadence. Longtium R2 has already taped out in SIMC. Now, Longtium R2 is testing in Aviation Computing Technique Research Institue(ACTRI).
Keywords/Search Tags:multiprocessor, SMP, bus interface unit, victim buffer, optimization of bus protocol, verification
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