Based Reconfigurable Dsp System Architecture And Some Of The Features

Digital Signal Processing (DSP) technique develops quickly and has been one of the advanced techniques. While although the performance of DSP processor has been improved in every aspect from its system architecture to its instruction architecture and have good flexibility, its flexibility is improved in cost of low computing speed, that is to say, current DSP processor can't meet with some application, such as real-time video processing. So a new computing method is needed, i.e. reconfigurable computing technique. It has not only the flexibility just like software, but also the high efficiency like ASIC.In this thesis, on the basis of the analysis of DSP technique, reconfigurable computing technique and its hardware (FPGA) logic architecture, and kinds of reconfigurable DSP system architecture, two kinds of algorithms fit for implementation on FPGA are found firstly by the research of the related DSP algorithm and function. One is the algorithm whose different part can be implemented in different time. The other one is the DSP algorithm based on convolution. By the study of the DSP algorithms (FIR/IIR/DFT/DHT/DCT), the common module of these algorithms can be found using CORDIC theory. Also a reconfigurable DSP computing engine system architecture is designed, which can implement all those DSP algorithms according to different parameters and the different network without changing the whole system architecture. In the following, Synthesis and simulation are passed using FPGA from Altera. What's more, the result is compared with the result from C program and the simulation of MATLAB. It proves that the design in this thesis is good for it can implement different DSP algorithm in the same reconfigurable system and fits to be a coprocessor in the audio/video communication application.