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Digital If Receiver And Its Algorithm

Posted on:2006-06-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y J WeiFull Text:PDF
GTID:2208360152498587Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the rapid development of the spaceflight technology, more and more requirements are brought forward by space shuttle experiments to the telemetric control equipments. Digital, Integration, Software and Recombination become the inevitable tendency. The former receiving set can't meet the new requirements because of its sole function, and scarce of flexibility and expansibility. Recent years, AD, DA, programmable logic device (PLD), Field Programmable Gate Array (FPGA) and digital signal processor (DSP) have made great progress .The ratio between performance and price becomes higher. Benefit from this, commercial software defined radio (SDR) which can replace the traditional wireless sending and receiving set has got a precondition. This research is for the integrative electronic telemetry of corresponding satellite .It's main purpose is to process downlink scientific data. Radio Frequency is assigned in S wave band. Intermediate Frequency is 70MHz. The scientific data format accords with CCSDS protocol, coded in RS, and modulated with BPSK. The principal system has been manufactured successfully now. This paper mainly introduces the principle of intermediate frequency digital receiving set based on software defined radio structure, including the designment of software and hardware, divided into AD and digital signal processing. For the consideration of ideal SDR,this paper discuss the digital down convert (DDC) algorithm structure based on FPGA using EDA technology, so the software will do the work that has been done by hardware in the past. The coming DDC system based on high performance FPGA is more flexible and can replace the existing appropriative devices. Works that have been done in this paper includes the following: ·Designed and manifactured the AD convert module which has high speed and outstanding dynamic performance. Including the schematic diagram, PCB design of the circuit, the assembly and debugging;...
Keywords/Search Tags:software defined radio (SDR), FPGA, AD, DDC
PDF Full Text Request
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