Media Processor Verification Platform For Research

Media processor is developed rapidly in the last twenty years to meet the fast increasing demand of multimedia application. Media processors can be classified into two pieces, special purpose programmable processor and general purpose programmable processor, or dedicated processor and reconfigurable processor. These processors have improved the compute power to meet the media processing requirement. Reduced Instruction Set Computer (RISC) and Digital Signal Processor (DSP) have different application areas due to their different Instruction Set Architecture (ISA) and micro-architecture. RISC/DSP is a hybrid of traditional RISC and DSP processor. Merit to both characteristics of RISC and DSP, RISC/DSP is more capable for complex media processing.This paper describes a RISC/DSP processor -- MediaDSP3200 (MD32) , which isdeveloped by the Department of Information Science and Electronic Engineering in Zhejiang University. MD32 ISA is a novel architecture, which features with both RISC and DSP. Single Instruction Multi Data (SIMD) is also supported in MD32. A characterized RISC/DSP micro-architecture and unified pipeline is designed based on MD32 ISA. It is not only good at executing system tasks like RISC processor, but also expert in digital signal processing like DSP. This makes MD32 more powerful in multi-media signal processing.A serial of method of verification are studied in this paper. These method included element-verification, structure-verification, system-verification, are focused on the demand of the processor design. Many ways such as Wave, log .etc are used in these method.For increasing the verification speed of MD32, FPGA based Media Processor Verification Test Platform (MPVTP) is introduced in this paper. This platform includes a FPGA based hardware sub-platform and a software sub-platform running on host PC. Both the hardware and the software can be re-configured quickly to accommodate different media processor for different simulation specification. MD32 is simulated on this platform and the design is verified.To optimize the memory system of MD32, a novel Two-dimesion DMA controller and bus protocol are studied in this paper . Compared with conventional methods, the speed of video decode and the efficiency of data exchange are much improved.