Fpga Prototype Process For Video Processing Chip Research And Implementation,

As VLSI design becomes larger and takes up much longer time, verification and debugging of logic design become the dominating part of total design period. In order to reduce the time for obtaining a valid design, many verification techniques have been studied. FPGA is relatively useful in such case due to its rapid implementation.This dissertation firstly introduces structure of Altera's APEX 20K family device in particular, compared FPGA with ASIC from three facets as size, speed and power consumption, and discusses the necessary of using FPGA prototype to do chip verification as well as the advantage and limitation of this technology.Then this paper introduces a quick and effective flow to translate the design structure of ASIC to that of FPGA as well as some related EDA tools like Quartus II, Certify, Synplify Pro and Amplify Physical Optimizer. The Video Post-process project is cited as an example which uses this translation flow to realize the prototype of a chip design on FPGA.The last part of this paper serves as a summary. In one hand, FPGA design is different than ASIC design in essence. FPGA prototype verification can not replace the traditional method. It's just a tradeoff with ASIC design and FPGA design. In another hand, with the cost decreasing and performance enhancing, FPGA is more suitable for those middle-mall scaled chip design that are sensitive to the market demand, even when those do not have a very clear standard at the beginning. It will probably be a new method for chip design realization.