High-speed Digital Circuits, Micro-system Structure

This dissertation focuses on the high performance digital circuits design and relative issues, using the concept of logic balance. These research works include presenting the high performance realization techniques for all of the usually basic functional units at the logic level, the basic rules and experiences of how to realize the high performance digital circuits by FPGA or standard cells. Moreover, research works on the low cost, low power and the communications with external circuits for high performance digital circuits are also included.The research works includes:1.The high speed realization methodology is presented using the concept of logic balance for all of the usually basic functional units such as counters, comparators, encoders, adders, finite state machines (FSM), multipliers, multiply accumulation cells and discrete cosine transformers (DCT).2. The high performance realization rules and experiences are discussed at the level of micro-architecture, logic and layout respectively.3. The approach of how to improve performance, reduce areas and power for high performance digital circuits is studied.4. Through using the concept of logic balance, a high performance telecommunication switch network test chip is accomplished by using Xilinx Virtex 300E-6 and the working clock frequency is up to 125MHZ. This chip can give an exact test for the network delay time, throughput, network delay time dither, rate of errors and lost data. The detailed design scheme is presented and it is described using the language of VHDL and verified using FPGA.5. One part of core logic of a micro-control unit (MCU) and its external circuits are designed. This chip is verified exactly using FPGA, and then synthesized using the standard library cells of TSMC. The layout and post-simulation are also finished. Now it is manufacturing out of border. It will be used in the control of liquid crystal display (LCD) and air-conditioners and multi-media playing.