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Fast Pll Frequency Synthesizer Integrated Design And Simulation

Posted on:2003-11-23Degree:MasterType:Thesis
Country:ChinaCandidate:X F KuangFull Text:PDF
GTID:2208360065450741Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In this paper, the development of present situation and technology level of fast frequency synthesizer are analyzed and summarized. Also, the theory and methods of fast frequency synthesizer are expounded profoundly. The design and PSPICE simulation of a fast, high frequency output synthesizer are discussed in detail with the introduction of phase-locked loop. To quiken the frequency switching speed, a method to aid capturing the frequency by presetting voltage is adopted, which produces ideal effect. To highten the output frequency, a LC voltage controlled oscillator that calls Crapoor circuit is adopted. Its output frequency reaches about IGHz.In the integrated circuits' design and PSPICE simulation of the devices in frequency synthesizer, the latest international advanced theorematic circuits are inrrduced and renovated. Under the condition of 0.8um CMOS technics, the circuit design is simalated with HSPICE software, as meets the anticipative demands. Many basic circuit models are fabricated, and the material parameters are selected to make the devices reaching its highest working frequency. The simulation shows that both pulse-swallowing counter and D/A converter's working frequency reach 330MHz. In the level of circuit simulation, their frequency performace index are higher than the index of the same products in market 1-2 quantitative degrees. These designs have the guiding significance to practical production.
Keywords/Search Tags:Frequency synthesizer, Phase-locked loop(PLL), CMOS, Application specific integrated circuit(ASIC), Circuit desgin, PSPICE simulation, Highest working frequency
PDF Full Text Request
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