The Design Of CMOS Low-voltage And Micro-consumption Folding Cascode Operational Amplifiers

In the research of biology, integrated circuits must work in low voltage and low static current. The low-voltage analog circuits, on the one hand, can obtain the low power. On the other hand, they can increase the stability of circuits. So it is very important to develop micro power dissipation IC in the electronic industruy.The operational amplifier, as the basic component in an analog system and mixed-signal system, can greatly improve the performance of IC in system level. Therefore, the design of low-voltage and micro power operational amplifier is very necessary.The thesis had done the widespread investigation and study to the domestic and foreign's technologies of analogy low voltage and low power, and analyzed the principles of work, merts and shortcomings of these technologies, based on the principle of operational amplifier, introduce the schematics of the input, output stage and bias circuits. On this basis, designed a power supply voltage of 0.75 V low voltage micro power and rail-to-rail CMOS operational amplifier. When designing input stage, in order to obtain a large output swing, it used low voltage folded-cascode structure. In the bias circuit design, the current mirror load did not use the traditional standard cascode structure, but used the low voltage, wide-swing cascode structure which was suitable to work in low voltage. In this paper, to change the traditional operational amplifier, based reference source design method, using a current mirror load differential amplifier designed a reference current source, to provide a stable bias current and bias voltage to ensure the stability of the operational amplifier. When designing output stage, in order to obtain higher power efficiency, use of feed-forward class AB push-pull output structure, it was able to achieve full-swing in the low voltage rail-to-rail output. And used the Miller compensate technology with a adjusting zero resistance to compensate the operational amplifier.The circuit design is realized in CSMC 0.35μm CMOS technology and HSPICE simulation. The results indicate that it consumes only 3.6μW, achieves the dc open gain of 106 dB, the unity-gain frequency of 360 kHz and the phase margin of 68°with the same load. All of pre-defined specifications are satisfied with the simulation results.