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Research On 3D NoC Fault Tolerant Routing Algorithm

Posted on:2016-12-11Degree:MasterType:Thesis
Country:ChinaCandidate:Y F WangFull Text:PDF
GTID:2208330464963534Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
At present, Systems-on-Chip(SoC) have now entered the multi-core era. It contains hundreds of Intellectual Properties cores, such as programmable processors, coprocessors, accelerators, application-specific IPs, peripherals, memories, reconfigurable logic, and even analog blocks. The International Technology Roadmap for Semiconductors foresees that the number of Processing Elements(PEs) that will be integrated into a single chip will be soar to thousands by 2020. As the number of communicating elements increases, an efficient, scalable and reliable communication elements is needed by NoC. As technology geometries shrink to the nanometer regime, however, the communication delay and power consumption of global interconnections become the major bottleneck of SoC. NoC design paradigm which based on a modular packet-switched mechanism can address a large of the on-chip communication issues, such as performance limitations of long interconnects and integration of a large number of PEs on a chip. The overall performance of NoC depends on several network properties, such as topology, routing algorithm, flow control and switching technique. The routing algorithm has a strong impact on several nonfunctional requirements of a NoC-based system. Performance, reliability, energy consumption, power dissipation, thermal aspects.The research contents are given as follows:(1) Design and implementation a 3D NoC ZoneDefense Fault-Tolerant routing algorithm without virtual channels which called 3D-ZDFT for short. We first give the definition of the convex fault cube which extended from convex fault block. The convex fault cube is a kind of fault model and includes faults into convex faulty cube. Then we introduce the method of forming defense zones based on convex fault cube. The algorithm established on 3D defense zones, 3D defense zones can provide the fault location information. According to the information provided by the defense zone, the 3D-ZDFT can detection fault cube in advance and change the forwarding port, implementation of fault tolerant at the same time to avoid the deadlock. Experimental results show that 3D-ZDFT has lower network latency and higher reliability compared to HamFA.(2) Design and implementation 3D NoC fault tolerant routing algorithm based on A*algorithm which called A*FT. It uses a heuristic approach to find a path that can guarantee to find a shorter path in the shortest possible time. The algorithm has both advantages of adaptive routing algorithm and deterministic routing algorithm. The routing path is unchanged while the network relatively stable. Meanwhile, the pathfinding algorithm do not started and use the path which has deterministic the path before. Pathfinding algorithm will be started when some node or link be failed or somewhere traffic bandwidth reaches a certain threshold in the network. The subsequent node which send information through here will perform pathfinding algorithm to find a new path. The algorithm not only implement fault tolerance, but also play the role of wellbalanced traffic. Experimental results show that A*FT has lower network latency and higher reliability compared to HamFA.
Keywords/Search Tags:3D Network on Chip, Fault Tolerant Routing Algorithm, ZoneDefense, A* Algorithm, Without Virtual Channel
PDF Full Text Request
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