Research On Fault-tolerant Routing Algorithm Of Network-on-chip On Awareness Of Fault

With the increase of chip integration, multiple IP communication of System-onChip(SoC) based on bus architecture becomes a serious problem, Network-on-Chip(NoC) showing the advantages from system architecture to communication capabilities make NoC become irreplaceable choice. The improved of chip integration increases the possibility of defects in chip production and failure occurred in chip operation, so NoC fault-tolerant technology has become a research hotspot of many researchers in recent years. Software fault-tolerance for its economic and practical and resource reusable becomes the preferred NoC fault-tolerant technology. Fault-tolerant routing algorithm has a significant impact of NoC transmission delay, throughput and other performance. So research on fault-tolerant routing algorithm has a promoting role in the development of NoC. The major sudies of the dissertation as follows:(1) Improve the signature XY routing algorithm of NoC, fault-tolerant function is increased. By studying the XY routing algorithm in 2D Mesh NoC, customized YX, XYX and YXY routing algorithms. Applying these algorithms adaptively to the entire communication network balances the network load, while the algorithm does not need a virtual channel, the difficulity of router arbitration is not increased. Based on parity turning model ideology, route nodes are divided into the even nodes and odd nodes, the fault nodes are surrounded by the active area, applying the improved parity turning model to the active area, and setting a new routing rule. Based on the location of the source node and the destination node, the data stream routing is divided into four cases, not only achieve fault-tolerance and reduce network transmission time, while alleviating the overload problem in X direction caused by XY routing algorithm. Resource dependence ring has not been occurred in the routing process, namey achieving deadlock-free.(2) A novel fault-tolerant routing algorithm of 2D Mesh on the base of virtual channels is proposed. The algorithm uses the minimum number of virtual channels, namely an increase of only two virtual channels in the Y direction, X direction no virtual channel. The whole network is divided into two sub-networks by virtual channel in Y direction, so that data streams along the X negative and X positive direction has a virtual channel respectively, achieving maximum utilization of the virtual channel. Still using the steering model in the two sub-networks ensures deadlock-free, but for the whole network, it is a fully adaptive fault-tolerant routing algorithm, which makes network load balancing. When there is only one fault node, the proposed algorithm routes packets along the shortest path, thus reducing routing hops, thereby reducing the power consumption of the network and delay. In the case of multiple fault nodes, with the improved priority algorithm, combined congestion degree of the adjacent nodes and the extended neighbor status register, local node can predict state of the second adjacent node before routing packets, avoiding data back, not only realize the fault-tolerance, but also obtain low congestion, low latency and high throughput.(3) Build the 2D Mesh Network-on-Chip model at OPNET simulation software for testing the proposed fault-tolerant routing algorithm, containing the construction of network topology and link model of the network layer, the modular composition of node layer, and design important source module, route module, sink module of the process layer, and implementation of the respective states. Simulation results show that the proposed fault-tolerant routing algorithm than traditional XY routing algorithm and OE algorithm have a certain improvement in latency and throughput.