| Faulty nodes can be avoided by the fault-tolerant adaptive routing algorithm in the network on chip,and network traffic can be evenly distributed to each path of the network topology,thereby network delay is reduced and network throughput is improved.The fault reminding mechanism based on fault value can only be adopted by the traditional fault-tolerant adaptive routing algorithm based on ant colony optimization.It can not reflect the impact of fault nodes on path congestion,and the pheromone update mechanism is also too simple.By combining the effective buffer length and fault value,the routing function and the performance of the fault-tolerant adaptive routing algorithm is improved.The fault-tolerant adaptive routing algorithm in the network on chip is improved based on ant colony optimization.Its work is mainly reflected in the following three aspects:(1)Relying on the existing fault detection circuits,based on the location of the faulty nodes,the fault value,path complexity,and effective buffer length are used to characterize the impact of the fault point on the network on chip.(2)The size of the routing table of nodes in the network on chip is reduced,and the memory overhead caused by storing information values is also reduced.(3)The routing functions is improved.When the output path is filtered,the pheromone value of the link is updated in conjunction with the indicators such as the fault value and the effective buffer length,and the new pheromone value is written into the routing table while the output path is obtained.The Noxim simulator is used to establish single-point,two-point and four-point fault models under the 8×8 Mesh topology structure,and the synthetic traffic experiments are performed.Experiments show that the average delay of the improved algorithm is 10.7%~20.3% lower than that of the ACO-FAR algorithm,the throughput rate is 4.46%~24.4% higher than that of the ACO-FAR algorithm,and the energy efficiency ratio is not lower than that of the ACO-FAR algorithm. |
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