Design Of Dynamic Reconfigurable Baseband Modem

Field-Programmable Gate Array (FPGA) is a group of widely used embedded processers due to its repeated programmable nature and high speed. With the improved the fabrication process, FPGA providers are now able to integrate more computing units on a single chip. However, the tasks feed to the FPGA processers during its engineering application are also becoming more and more computational complicated. Thus, developing an optimized scheme to use the limited computing resources is still the first consideration for the program designer of the FPGA. An emerging technology named Dynamic Partial Reconfigurable (DPR) provides an alternative solution for on-chip resources usage optimization. Among all its benefits, the major advantages of this technology are power and resource saving, flexibility and faster configure.Based on the principle of Software Defined Radio (SDR), this dissertation presents a dynamic baseband modem using the DPR technology. At the transmitting block, the signal first goes through a convolutional coding and then modulated by one of the following modulation scheme:Differential Quaternary Phase Shift Keying (DQPSK), Differential Binary Phase Shift Keying (DBPSK) and Gaussian Minimum Shift Keying (GMSK). After using interpolation to change rate, the signal are up-converted by quadrature modulation and sent to the transmitting end. At the receiving end, we first apply carrier synchronized down-conversion to the input signal and then conduct a decimation to decrease rate of signal. In order to choose the demodulation scheme accordingly, post-timing synchronization method is used to screen out optimized point of the corresponding demodulation scheme. In the end, the data is decoded through Viterbi algorithm from convolutional coding. The baseband modem presented this dissertation has the capability of operating under five different data rates as well as switching dynamically among DQPSK DBPSK and GMSK modulation schemes.