Design And FPGA Realization Of Interruption Continuous Wave Radar Signal Processing System

The quasi-continuous wave(QCW) radar, which has the advantage of pulse dopper radar and continuous wave(CW) radar, solves the problem of transmit leakage of continuous wave radar by using the isolation between transmitter and receiver, and improves the detection performance effectively. Also, digital array radar(DAR) has the advantage of wide instantaneous dynamic range, flexible beam forming, strong anti-interference ability and high spatial degrees of freedom.Respectively from radar signal form and way of the scanning style of the radar antenna, representing the future development direction of radar.This paper discusses the characteristics of binary phase-coded, poly-phase code and chirp signal. At the same time, it analyzes targets, target fluctuation and clutters in the echo of QCW radar. On these bases, a mathematical model for the IF echo of QCW radar is established. Then a digital signal processing system for the radar based on FPGA is simulated. The system consists of digital down converter (DDC), matched filtering, sidelobe suppression, clutter suppression and moving target detection. For the part of clutter suppression, studys a MTI filter based on zero designed method. Also,a frequency domain pulse compression system based on segmentation overlap cyclic convolution method is designed to avoid the producing of special side lobes in the processing of frequency domain pulse compression. On this basis, the Matlab simulation system of signal processing system has been builded, through the simulation each module’s processing algorithms get the feasibility and performance. Then a 18 channels high-speed acquisition and processing hardware board has been designed. The hardware includes high speed ADC, FPGA, and multi-core DSP. According to the functional and performance requirements of the circuit, it has completed the schematic design and PCB design of each hardware module, and complete the, commissioning and performance test. At last the paper studies the FPGA implementation of the signal processing system. The correctness of the design and FPGA implementation of the signal processing system is verified by the test results of logic analyzer and Matlab.